The present invention relates to a semiconductor device, and more particularly to a power metal oxide semiconductor integrated circuit which will hereinafter be referred to as power MOS-IC.
It has been known that the power MOS-IC is used for driving various loads such as a voice coil motor driver for a hard disk drive, a floppy disk driver, and a stepping motor driver for a CD-ROM drive. A conventional power MOS-IC wilt be described. FIG. 1 is a circuit diagram illustrative of a circuit configuration of a first conventional power MOS-IC. The first conventional power MOS-IC has the following circuit elements. A control circuit 313 receives both an input signal Vin from an input power 311 and a reference voltage Vref from an input reference power 312. A first driver circuit 314 is provided which has a first input which is connected to a first output of the control circuit 313 for receiving a first output signal and also has a second input which is connected to a second output of the control circuit 313 for receiving a second output signal. A second driver circuit 315 is provided which has a first input which is connected to the second output of the control circuit 313 for receiving the second output signal and also has a second input which is connected to the first output of the control circuit 313 for receiving the first output signal. A series connection of a load element 316 and a current detecting resistance 321 is provided in series between outputs of the first and second driver circuits 314 and 315. A sense amplifier 323 is provided which has two inputs connected to both sides of the current detecting resistance 321 for receiving a voltage across the current detecting resistance 321. An output of the sense amplifier 323 is connected to an input side of the control circuit 313.
FIG. 2A is a circuit diagram illustrative of each of the first and second driver circuits included in the first conventional power MOS-IC. The driver circuit 211 receives differential signals 212 and 213 and outputs an output signal 214. FIG. 2B is a circuit diagram illustrative of a circuit configuration of the driver circuit of FIG. 2A. The driver circuit 211 comprises a series connection of a p-channel MOS field effect transistor 225 and an n-channel MOS field effect transistor 226 between a high voltage line supplying a voltage VM and a ground line. The p-channel MOS field effect transistor 225 and the n-channel MOS field effect transistor 226 are connected through an output node to each other. The output node is connected to an output terminal from which the output signal appears. The p-channel MOS field effect transistor 225 is connected in series between the output node and the power high voltage line, whilst the n-channel MOS field effect transistor 226 is connected in series between the output node and the ground line. A gate of the p-channel MOS field effect transistor 225 receives the first differential signal 212, whilst a gate of the n-channel MOS field effect transistor 226 receives the second differential signal 213.
A current is applied to the load element 316. The current detecting resistance 321 is connected in series to the load element 316 for detecting a current which flows through the load element 316 in order to control the current applied to the load element 316. The sense amplifier 323 detects any drop of the voltage across the current detecting resistance 321. The conventional power MOS-IC has the following problems.
As described above, in an output side of the power amplifier, the current detecting resistance 321 is connected in series to the load element 316, for which reason a power loss is caused by the current detecting resistance 321. In considerations of both power losses of the load element 316 and the current detecting resistance 321, it is advantageous to reduce the ON-resistances of the above load current control p-channel and n-channel power MOS field effect transistors 225 and 226. The reduction in the ON-resistances of the above load current control p-channel and n-channel power MOS field effect transistors 225 and 226 results in an increase in area of the power MOS field effect transistor. One side voltage of the current detecting resistance 321 is close to the ground level, for which reason the current detecting sense amplifier 323 is needed to have a wide input voltage range. If the current detecting sense amplifier has a narrow input voltage range, then the sense amplifier is inoperable and no control to the current applied to the load element can be obtained.
In the above circumstances, it had been required to develop a novel semiconductor device free from the above problem.
Accordingly, it is an object of the present invention to provide a novel semiconductor device free from the above problems.
It is a further object of the present invention to provide a novel semiconductor device which is capable of detecting a load current without any power loss to reduce the ON-resistance of the output power MOS field effect transistors and also to reduce the area of the output power MOS field effect transistors.
It is a still further object of the present invention to provide a novel semiconductor device with a current detecting circuit comprising a current detecting sense amplifier free of any restriction to an input voltage range.
The present invention provides a semiconductor device comprising: a load connected between outputs of power amplifiers; a mirror current generating circuit connected to the power amplifiers in an output side of the power amplifiers for generating a mirror current which is smaller than and proportional to a load current applied to the load, and the mirror current generating circuit being connected out of a current path through the load between the outputs of the power amplifiers; and a mirror current detecting circuit connected to the mirror current generating circuit for detecting the mirror current.
The above and other objects, features and advantages of the present invention will be apparent from the following descriptions.